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Domino Logic Keeper Circuit Design Techniques: A Review | Journal of The Institution of Engineers (India): Series B
2. Dynamic CMOS Design
Low leakage domino logic circuit for wide fan‐in gates using CNTFET - Garg - 2019 - IET Circuits, Devices & Systems - Wiley Online Library
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Figure 3 from Design and Implementation of Domino Logic Circuit in CMOS | Semantic Scholar
Full article: Design of energy efficient domino logic circuit using lector technique
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presentation on high-performance_dynamic_cmos_circuit | PPT
File:Domino Logic Gates.svg - Wikipedia
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High Performance Domino Logic Circuits in Low Power VLSI Design: A Novel Approach : Nehra, Suman, Sharma, Krishna Gopal, Sharma, Tripti: Amazon.it: Libri
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Design of Low Power Fast Full Adder using Domino Logic Based on magnetic tunnel junction and Memristor
Figure 1 from Design and Implementation of Domino Logic Circuit in CMOS | Semantic Scholar
